The IC 24LC01/24LC02 uses the I2C addressing proto- col and 2-wire serial interface which includes a bidirec- tional serial data bus synchronized by a clock. Microchip 24LC02 EEPROM are available at Mouser Electronics. Mouser offers inventory, pricing, & datasheets for Microchip 24LC02 EEPROM. Description, Bit/Bit Serial EePROM Write Protect Memory Chips. Company, Pronics. Datasheet, Download 24LC02 datasheet. Quote. Find where to.
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A read operation is initi- ated if this bit is high and a write operation is initiated if this bit is low. Data Input Hold Time. This happens during the ninth clock cycle.
The device address word consist of a mandatory one, zero sequence for the first four most significant bits refer to the diagram show- ing the Device Address. Data transfer may be initiated only when the.
Search field Part name Part description. Commerical temperature range 0. Output Valid from Clock. Characteristics Functional Description Timing Diagrams. During data transfer, the data line must remain stable whenever the clock line is high.
24LC02 Datasheet(PDF) – Ceramate Technical
ACK 24lc022 can be initiated immediately. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect dataxheet reliability. Serial clock data input. A page write is initiated the same as byte write, but the microcontroller does not send a stop condition after the first data word is clocked in.
After this period the first clock pulse is generated. If not, the chip will return to a standby state. Output Capacitance See Note. The pin is open-drain driven and may be wired-OR with any number of other open-drain or open collector devices. The microcontroller must terminate the page write sequence with a stop condition. If the device is still busy with the. Data Input Setup Time. Clock vatasheet data transition.
Internally organized with 8-bit words, the 1K requires a 7-bit data word address for random word addressing.
Upon receipt of this ad- dress, the EEPROM will again respond with a zero and then clock in the first 8-bit data word. These are stress ratings only. For relative timing, refer to timing diagrams. The SDA pin is bidirectional for serial data transfer.
Partial page write allowed. Time dahasheet which the bus must be free before a new transmission can start.
The higher data word address bits are not incremented, re- taining the memory page row location refer to Page write timing. After receiving the 8-bit data word, the EEPROM will output a zero and the address- ing device, such as a microcontroller, must terminate the write sequence with a stop con- dition. Since the device will not acknowledge during datashret write cycle, this can be used to determine when the cycle is complete this feature can be used to maximize bus throughput.
Write operation with datasheet timer. Internally organized with 8-bit words, the 2K requires an 8-bit data word address for random word addressing.
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Once the stop condition for a write command has been issued from the master, the device initiates the internally timed write cycle. Instead, after the EEPROM ac- knowledges the receipt of the first data word, the microcontroller can transmit up to seven more data words.
These three bits must compare to their corresponding hard-wired input pins. Input Capacitance See Note. Stresses dstasheet the range specified under “Absolute Maxi.
A write operation requires an 8-bit data word address following the device address word and acknowledgment. The device is optimized for use in many industrial and com. Hardware controlled write protection.